1. Field
This patent document relates to a semiconductor design technology, and more particularly, to a semiconductor integrated circuit including through-silicon vias (TSVs) and a method of driving the same.
2. Description of the Related Art
For integration of semiconductor integrated circuits, a variety of package technologies have been suggested. In particular, a chip stack in which a plurality of memory chips are stacked to form one semiconductor integrated circuit uses a through-electrode to transmit signals to a plurality of memory chips. Since memory chips are generally fabricated using silicon wafers, these through-electrodes are referred to as through silicon vias (TSVs).
Memory chips include power-up signal generation circuits for detecting whether external voltages, received from outside (e.g., an external device or source), reach a preset target level. The power-up signal generation circuit detects the level of the external voltage, and generates a power-up signal when the external voltage reaches the target level. The power-up signal contains information on whether the external voltage reaches the target level and is stabilized. Thus, an internal circuit of the memory chip receives the power-up signal and determines an operation period. During the power-up operation, a pumping operation must be performed to increase the external voltage, so that the internal circuits can operate.
When there are multiple memory chips, each of the memory chips detects external voltage level and generates a power-up signal. Thus, the power-up signal for each memory chip may be generated at the same or different times. Thus, it is difficult to predict the timing of generating the power-up signal due to process variations in each of the memory chips. Furthermore, when the power-up signals of the memory chips are equal, the pumping operations are performed at the same time, thereby increasing power consumption. As the power consumption of the memory chips increases, a failure may occur in memory chip operations due to unstable power.